Carriers for semiconductor components such as semiconductor chips, for example, in which integrated circuits may be realized, or else power semiconductor modules, are often connected thereto by means of thin wires. In this case, these thin wires are mechanically and electrically fitted with a metallization on the carrier by means of a bonding connection.
The thin wires that thus produce the electrical connections between the carrier and the semiconductor component have diameters of up to 100 μm. The metallization of the carriers has a specific surface roughness, which must not assume excessively large values, however, in order to be able to produce the bonding connections between the semiconductor component and the carrier with a high yield.
A “carrier” is understood for example to include substrates such as, in particular, so-called DCB substrates (DCB=Direct-Copper-Bonding), ceramic substrates, which are coated for example with a thick copper layer having a layer thickness of 50 μm to 1 mm, etc.
Without particular treatment, such carriers have a granular surface structure with considerable roughness after their production process. Such surfaces having a high degree of roughness are not suitable for thin wires for reliable bonding. The production of a suitable surface roughness in the case of these carriers generally requires a relatively high outlay. Furthermore, it should also be taken into consideration that on account of continuously advancing miniaturization, at the present time power semiconductor components are also being bonded with thin wires.
There is an additional and even greater problem for the mounting of semiconductor chips with thin liquid soldering layers or by means of deformable LTC low temperature connections on carriers. In this case, the liquid soldering layers or the deformable LTC layers on the carrier have a thickness of approximately 1 μm to 50 μm. A cohesive connection can be achieved only when the surface roughness of the carrier can still be filled with the solder of the soldering layer or the deformable layer from the LTC connection. Furthermore, it is endeavoured to mount semiconductor chips with integrated circuits onto DCB substrates.
In order to overcome the above difficulties, it has been taken into consideration hitherto to subject surfaces of carriers to an after-treatment by polishing by way of example. Such a procedure is relatively complex, however. Moreover, thought has already been given to employing only those carriers which, on account of their production process, have a sufficiently smooth surface for bonding connections with thin wires. However, carriers of this type are complex in terms of their production and thus expensive. For these reasons it has not been possible hitherto for example to bond chips with integrated circuits onto DCB substrates with ultrasonic wire (“US bonding”).